To use this file copy and paste this:    // #URL-lib "http://pin1.org/forthlib/flb/Interupts/interrupt.flb"   into BV Terminal 3 or here to download.

// * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *  
// High level interrupts
// This file contains the words to activate and act
// upon interrupt requests. A request is made by placing an entry
// into the interrupt table using int> "word" (without the quotes)


// REQUIRES:
// #URL-lib "http://pin1.org/forthlib/flb/General/decompile.flb" 


// CONSTANTS:
// the following constants map to the interrrupt 32bit word
// in the VIC tables, see LPC user manual chapter 5
4 constant TIMER0
5 constant TIMER1
6 constant UART0
7 constant UART1
8 constant PWM0
9 constant I2C0
10 constant SPI0
11 constant SPI1
12 constant PLL
13 constant RTC
14 constant EINT0
15 constant EINT1
16 constant EINT2
17 constant EINT3
18 constant AD0
19 constant I2C1
20 constant BOD
21 constant AD1
// -------------- Vector constants --------------------
&FFFFF010 constant VICena   // RW enable 1 = enable
&FFFFF00C constant VICsel   // 0 = IRQ 1 = FIQ
&FFFFF014 constant VICclr   // 1 = clr-irq

Full Contents of File

// * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
// High level interrupts
// This file contains the words to activate and act
// upon interrupt requests. A request is made by placing an entry
// into the interrupt table using int> "word" (without the quotes)

// REQUIRES:
// #URL-lib "http://pin1.org/forthlib/flb/General/decompile.flb"


// CONSTANTS:
// the following constants map to the interrrupt 32bit word
// in the VIC tables, see LPC user manual chapter 5
4  constant  TIMER0
5  constant  TIMER1
6  constant  UART0
7  constant  UART1
8  constant  PWM0
9  constant  I2C0
10  constant  SPI0
11  constant  SPI1
12  constant  PLL
13  constant  RTC
14  constant  EINT0
15  constant  EINT1
16  constant  EINT2
17  constant  EINT3
18  constant  AD0
19  constant  I2C1
20  constant  BOD
21  constant  AD1
// -------------- Vector constants --------------------
&FFFFF010  constant  VICena      // RW enable 1 = enable
&FFFFF00C  constant  VICsel      // 0 = IRQ 1 = FIQ
&FFFFF014  constant  VICclr      // 1 = clr-irq

// ------ Displays the interrupt table ----------------
// prints address and name from CFA
// used as part of displaying interrupt table
: intr1  // (cfa --- ) prints word or number
dup  12  -  ?@  &f00  and  &900  =      // test for valid header
if                    // print header
        8  -  // move to name field
        dc2  // requires Decompile.fth
else 
        drop  ."  ?"            // unknown
then 
;

// displays 1 line for interrupt table
// [#] address, (contents)
// (addr ---)
: (intr.)
        dup
        12  sys@  -  8  -  4  u/mod swap drop
        dup  32  > 
        if
                drop  ."  [x]  "
        else       
                91  emit  <#  #  #  #>  stype  93  emit  space
        then       
        dup  ph.  space      // address
        dup  40  emit  @  ph.  41  emit  space  // contents
        @  intr1  // the rest
;

// displays full interrupt table, the first 2 words are used
// for the system
// (---)
: <0>intr.
        cr 
        12  sys@                  // start address
        31  for
                dup  (intr.)   4  +
                cr
        next
        drop
;               
 
// -------------- placing and activating words --------------------
// places [word] into interrrupt table at given offset, offset is a number
// from 0 to 32
// use like this 6 int> fred
// where 6 in the interrupt slot and fred is the word to call
// ( off --- [word])
: <0>int>
        4  *                  // multiply offset
        8  +                  // bypass control
        12  sys@    +    // add to ram start
        '              // get CFA of word in steam
        swap  !
;

// It is sometimes not convenient to supply the word in the input stream
// and so this wor will accept a CFA of a word on the stack as an i/p
// ( cfa, off -- )
: <0>int>>
        4  *                  // multiply offset
        8  +                  // bypass control
        12  sys@    +    // add to ram start
        !            // store cfa
;

// -------------- Selecting and enabling ----------------
// These words are better used in conjunction with the actual
// interrupts otherwise an interrupt may occure when enabling
// after disabling
// Interrupt select, use one of the constants for clarity
// example AD0 intSel. This will select a particular int
// in the vic register
: <0>intSel ( int -- )
    1  swap  lshift      // create 32bit # from interrupt vector
    VICsel  @                // dont disturbe other selections
    or  VICsel  !
;   

// Enable interrupt, use a constant e.g. TIMER0 intEn
: <0>intEn ( int -- )
    1  swap  lshift      // create 32bit # from interrupt vector
    VICena  @                // dont disturbe other selections
    or  VICena  !
;   

// disable an interrupt, but it will still be selected
: <0>intDis ( int -- )
    1  swap  lshift      // create 32bit # from interrupt vector
    VICena  @                // dont disturbe other selections
    or  VICclr  !
;